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CSC 320 - Computer Organization
Overview of the history of the digital computer, representation of numeric data, introduction to digital logic, logic expressions and Boolean functions, logic functions minimization. Processor and system performance, Amdahl’s law. Introduction to reconfigurable logic and special-purpose processors. Introduction to instruction set architecture, and microarchitecture. Processor structures, instruction sequencing, flow-of control, subroutine call and return mechanism, structure of machine-level programs, low level architectural support for high-level languages. Memory hierarchy, latency and throughput, cache memories: operating principles, replacement policies, multilevel cache, and cache coherency. Register-transfer language to describe internal operations in a computer, instruction pipelining and instruction-level parallelism (ILP), overview of superscalar architectures. Multicore and multithreaded processors. Course Learning Outcomes: 1) Students shall demonstrate an understanding of the internal organization of a computer system through assembly language. 2) Students shall design and simulate the data path and the control unit of a simple computer based on an instruction set. 3) Students shall demonstrate an understanding of pipelining including instruction sequencing, register value forwarding, data interlocking. 4) Students shall demonstrate an understanding of the basic concepts of multiprocessor and multi-core designs. 5) Students shall demonstrate an understanding of the history and possible future of the field necessary for staying at the forefront of computing systems development (life-long learning). 3.000 Credit hours 3.000 Lecture hours Levels: Undergraduate Schedule Types: Lecture, Tutorial Computer Science & Mathematics Department

CSC 320 - Computer Organization

Overview of the history of the digital computer, representation of numeric data, introduction to digital logic, logic expressions and Boolean functions, logic functions minimization. Processor and system performance, Amdahl’s law. Introduction to reconfigurable logic and special-purpose processors. Introduction to instruction set architecture, and microarchitecture. Processor structures, instruction sequencing, flow-of control, subroutine call and return mechanism, structure of machine-level programs, low level architectural support for high-level languages. Memory hierarchy, latency and throughput, cache memories: operating principles, replacement policies, multilevel cache, and cache coherency. Register-transfer language to describe internal operations in a computer, instruction pipelining and instruction-level parallelism (ILP), overview of superscalar architectures. Multicore and multithreaded processors.

Course Learning Outcomes:
1) Students shall demonstrate an understanding of the internal organization of a computer system through assembly language.
2) Students shall design and simulate the data path and the control unit of a simple computer based on an instruction set.
3) Students shall demonstrate an understanding of pipelining including instruction sequencing, register value forwarding, data interlocking.
4) Students shall demonstrate an understanding of the basic concepts of multiprocessor and multi-core designs.
5) Students shall demonstrate an understanding of the history and possible future of the field necessary for staying at the forefront of computing systems development (life-long learning).

3.000 Credit hours
3.000 Lecture hours

Levels: Undergraduate
Schedule Types: Lecture, Tutorial

Computer Science & Mathematics Department

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Catalog Entries		Date Apr 19, 2024