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Date
Jul 22, 2018
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Information Select the Course Number to get further detail on the course. Select the desired Schedule Type to find available classes for the course.

CSC 322 - Computer Organization Lab
Students gain experience with computer organization techniques by designing and implementing actual circuits using a high-level language, Verilog HDL and FPGAs. Course culminates in the design and simulation of a complete pipelined CPU.

Course Learning Outcomes:
1) Students should be able to describe analytically combinational and sequential circuits functions.
2) Students shall demonstrate the ability to use FPGAs in order to implement combinational and sequential circuits.
3) Students shall demonstrate the ability to use CAD tools such as Altera or Xilinx in order to implement and simulate circuits.
4) Students shall demonstrate the ability to design, implement, and simulate, a given system given a set of constraints, and to evaluate the system in terms of general quality attributes and possible tradeoffs.

1.000 Credit hours
3.000 Lab hours

Levels: Undergraduate
Schedule Types: Lab, Tutorial

Computer Science & Mathematics Division
Computer Science Department


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